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| (R) STB3NB60 N - CHANNEL 600V - 3.3 - 3.3A - D2PAK/I2PAK PowerMESHTM MOSFET TYPE STB3NB60 s s s s s V DSS 600 V R DS(on) <3.6 ID 3.3 A TYPICAL RDS(on) = 3.3 EXTREMELY HIGH dv/dt CAPABILITY 100% AVALANCHE TESTED VERY LOW INTRINSIC CAPACITANCES GATE CHARGE MINIMIZED 3 1 D2PAK TO-263 (Suffix "T4") DESCRIPTION Using the latest high voltage MESH OVERLAYTM process, SGS-Thomson has designed an advanced family of power MOSFETs with outstanding performances. The new patent pending strip layout coupled with the Company's proprietary edge termination structure, gives the lowest RDS(on) per area, exceptional avalanche and dv/dt capabilities and unrivalled gate charge and switching characteristics. APPLICATIONS s HIGH CURRENT, HIGH SPEED SWITCHING s SWITCH MODE POWER SUPPLIES (SMPS) s DC-AC CONVERTERS FOR WELDING EQUIPMENT AND UNINTERRUPTIBLE POWER SUPPLIES AND MOTOR DRIVE ABSOLUTE MAXIMUM RATINGS Symbol V DS V DGR V GS ID ID IDM (*) P t ot dv/dt(1) T stg Tj Parameter Drain-source Voltage (V GS = 0) Drain- gate Voltage (R GS = 20 k) Gate-source Voltage Drain Current (continuous) at Tc = 25 C Drain Current (continuous) at Tc = 100 C Drain Current (pulsed) Total Dissipation at Tc = 25 oC Derating F actor Peak Diode Recovery voltage slope Storage T emperature Max. O perating Junction Temperature o o 3 12 I2PAK TO-262 (Suffix "-1") INTERNAL SCHEMATIC DIAGRAM Value 600 600 30 3.3 2.1 13.2 80 0.64 4.5 -65 to 150 150 (1) ISD 3.3A, di/dt 200 A/s, VDD V(BR)DSS, Tj TJMAX Uni t V V V A A A W W/ C V/ ns o o o C C (*) Pulse width limited by safe operating area June 1998 1/9 STB3NB60 THERMAL DATA R t hj-ca se R t hj- amb R thc- si nk Tl Thermal Resistance Junction-case Max 1.56 62.5 0.5 300 o o o C/W C/W C/W o C Thermal Resistance Junction-ambient Max Thermal Resistance Case-sink Typ Maximum Lead Temperature For Soldering Purpose AVALANCHE CHARACTERISTICS Symb ol I AR E AS Parameter Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by Tj max) Single Pulse Avalanche Energy o (starting Tj = 25 C, I D = IAR , VDD = 50 V) Max Valu e 3.3 100 Unit A mJ ELECTRICAL CHARACTERISTICS (Tcase = 25 oC unless otherwise specified) OFF Symb ol V (BR)DSS I DSS I GSS Parameter Drain-source Breakdown Voltage Test Cond ition s I D = 250 A V GS = 0 Min. 600 1 50 100 Typ . Max. Un it V A A nA V DS = Max Rating Zero G ate Voltage Drain Current (VGS = 0) V DS = Max Rating Gate-body Leakage Current (V DS = 0) V GS = 30 V T c = 125 C o ON () Symb ol V GS(th) R DS( on) ID(o n) Parameter Gate Threshold Voltage V DS = VGS Test Cond ition s ID = 250 A ID = 1.6 A 3.3 Min. 3 Typ . 4 3.3 Max. 5 3.6 Un it V A Static Drain-source On V GS = 10V Resistance On State Drain Current V DS > I D(on) x R DS(on) max V GS = 10 V DYNAMIC Symb ol g fs () C iss C oss C rss Parameter Forward Transconductance Input Capacitance Output Capacitance Reverse T ransfer Capacitance Test Cond ition s V DS > I D(on) x R DS(on) max V DS = 25 V f = 1 MHz I D = 1.6 A VGS = 0 Min. 1.2 Typ . 2 400 57 7 520 77 9 Max. Un it S pF pF pF 2/9 STB3NB60 ELECTRICAL CHARACTERISTICS (continued) SWITCHING ON Symb ol t d(on) tr Qg Q gs Q gd Parameter Turn-on Time Rise Time Total Gate Charge Gate-Source Charge Gate-Drain Charge Test Cond ition s V DD = 300 V I D = 1.6 A VGS = 10 V R G = 4.7 (see test circuit, figure 3) V DD = 480 V I D = 3.3 A VGS = 10 V Min. Typ . 11 7 15 6.2 5.6 Max. 17 11 22 Un it ns ns nC nC nC SWITCHING OFF Symb ol t r(Vof f) tf tc Parameter Off-voltage Rise Time Fall Time Cross-over Time Test Cond ition s V DD = 480 V I D = 3.3 A R G = 4.7 V GS = 10 V (see test circuit, figure 5) Min. Typ . 11 13 18 Max. 16 18 25 Un it ns ns ns SOURCE DRAIN DIODE Symb ol I SD I SDM (*) V SD () t rr Q rr I RRM Parameter Source-drain Current Source-drain Current (pulsed) Forward On Voltage Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current I SD = 3.3 A V GS = 0 500 2.1 8.5 Test Cond ition s Min. Typ . Max. 3.3 13.2 1.6 Un it A A V ns C A I SD = 3.3 A di/dt = 100 A/s o T j = 150 C V DD = 100 V (see test circuit, figure 5) () Pulsed: Pulse duration = 300 s, duty cycle 1.5 % (*) Pulse width limited by safe operating area Safe Operating Area for D2PAK/I2PAK Thermal Impedance for D2PAK/I2PAK 3/9 STB3NB60 Output Characteristics Transfer Characteristics Transconductance Static Drain-source On Resistance Gate Charge vs Gate source Voltage Capacitance Variations 4/9 STB3NB60 Normalized Gate-source Threshold Voltage vs Temperature Normalized On Resistence vs Temperature Source-Drain Diode Forward Characteristics 5/9 STB3NB60 Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform Fig. 3: Switching Times Test Circuits For Resistive Load Fig. 4: Gate Charge test Circuit Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times 6/9 STB3NB60 TO-263 (D2PAK) MECHANICAL DATA mm MIN. A A1 B B2 C C2 D E G L L2 L3 4.3 2.49 0.7 1.25 0.45 1.21 8.95 10 4.88 15 1.27 1.4 TYP. MAX. 4.6 2.69 0.93 1.4 0.6 1.36 9.35 10.28 5.28 15.85 1.4 1.75 MIN. 0.169 0.098 0.027 0.049 0.017 0.047 0.352 0.393 0.192 0.590 0.050 0.055 inch TYP. MAX. 0.181 0.106 0.036 0.055 0.023 0.053 0.368 0.404 0.208 0.624 0.055 0.068 DIM. E C2 L2 A D L L3 B2 B G A1 C P011P6/C 7/9 STB3NB60 TO-262 (I2PAK) MECHANICAL DATA mm MIN. A A1 B B1 B2 C C2 D e E L L1 L2 4.3 2.49 0.7 1.2 1.25 0.45 1.21 8.95 2.44 10 13.2 3.48 1.27 TYP. MAX. 4.6 2.69 0.93 1.38 1.4 0.6 1.36 9.35 2.64 10.28 13.5 3.78 1.4 MIN. 0.169 0.098 0.027 0.047 0.049 0.017 0.047 0.352 0.096 0.393 0.519 0.137 0.050 inch TYP. MAX. 0.181 0.106 0.036 0.054 0.055 0.023 0.053 0.368 0.104 0.404 0.531 0.149 0.055 DIM. A C2 B2 B E L1 L2 D L P011P5/C 8/9 e A1 C STB3NB60 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a trademark of STMicroelectronics (c) 1998 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - France - Germany - Italy - Japan - Korea - Malaysia - Malta - Morocco - The Netherlands Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A. . 9/9 |
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